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Alexander Monakov

In APX, Intel is adding "conditionally-faulting" CMOV instructions named CFCMOV, with fault suppression for memory operands on false predicate, but that's not the sole distinction.

It has a memory destination form, two-operand form matching CMOV, and three-operand form with distinct destination register (APX also adds this "new data destination" encoding for CMOV).

When the predicate is false:
memory destination: retains old value
two-operand CFCMOV: writes zero!
three-operand: copies src reg.

Thus the two-operand CFCMOV does not depend on the destination register, which is neat (the three-operand form is available when zeroing on false is not desired), but it is not obvious from the assembly name at all, and can confuse people familiar with CMOV semantics.

I also like the exchange on the patch adding GCC support, paraphrasing:

— Fault suppression for AVX-512 is so costly the instructions are essentially unusable for vectorization, will it be different this time?
— We are told so, otherwise why would the instructions be added.

(compilers still don't really see when if-conversion is going to add dependency chain spanning the whole loop, and I'm not sure maintainers grok that either; but this time we'll get such chains over memory too!)

@amonakov Has there been any news on APX, etc? After the initial info and doc dump it seems to have been crickets from Intel.

@pervognsen there's work in progress adding all that to Binutils and GCC (hence my post), but possibly I'm misunderstanding what you're asking?

@amonakov Sorry, I more meant information from Intel. It seems like information silence from them after their initial announcement (which admittedly had a lot of information and documentation). I'm just curious about approximate product timelines, etc.

@amonakov What are you using for emulation currently?

@pervognsen I'm not doing any APX-related work and so I don't have a need for an emulator capable of that. I hope I didn't accidentally manage to indicate otherwise?

@amonakov You didn't indicate it, I just assumed based on your GCC affiliation and your post that you were working on it.

@pervognsen no, no, just commenting from the sidelines :)